Kapur, Rohit books & textbook
VLSI Test Principles and Architectures: Design for Testability (Morgan Kaufmann Series in Systems on Silicon (Hardcover))
Wang, Laung-Terng Wu, Cheng-Wen Wen, Xiaoqing Abdel-Hafez, Khader S. Jone, Wen-Ben Kapur, Rohit Keller, Brion Lee, Kuen-Jong Li, James C.-M. Li, Mike Peng Li, Xiaowei Mak, T.M. Min, Yinghua Nadeau-Dostie, Benoit Bhattacharya, Soumendu Nourani, Mehrdad Rajski, Janusz Stroud, Charles Volkerink, Erik H. Walker, Duncan M. (Hank) Wu, Shianling Touba, Nur A. Chatterjee, Abhijit Chen, Xinghao Cheng, Kwang-Ting (Tim) Eklow, William Hsiao, Michael S. Huang, Jiun-Lang Huang, Shi-Yu
Morgan Kaufmann /2006-07-21 Hardcover / 808 Pages
isbn-10: 0123705975 / isbn-13: 9780123705976
CTL for Test Information of Digital ICs by Kapur, Rohit (2002) Hardcover
Springer / Hardcover
